In Visual Memory v. NVIDIA (Fed. Cir. 2017), the Federal Circuit reversed the district court’s holding that Visual Memory’s U.S. Patent No. 5,953,740 is drawn to patent-ineligible subject matter. Instead, the court ruled that the ’740 patent claims an improvement to computer memory systems and is not directed to an abstract idea.
The ’740 Patent
At a high level, the ’740 patent describes a computer memory system that can be connected to different kinds of processors. The memory system has “programmable operational characteristics” based on characteristics of the processor; it includes several caches and a main memory (DRAM) connected to a bus. One cache can be programmed to store only code data, and another cache can be programmed to buffer data writes to the main memory only from the processor. The main memory can be programmed to selectively reopen either code or non-code data pages. (See ’740 patent abstract.) Figure 1 of the patent is copied below.
As shown in Figure 1, the memory system 10 includes a system memory (DRAM) 12, an internal cache 16, a pre-fetch cache 18 and a write buffer cache 20, each connected to bus 14. Access to DRAM 12 is controlled by DRAM controller 22. The data stored in system memory 12 can be divided into code data (instructions) and non-code data. The memory system 10 is designed for use with a host processor in combination with other bus masters or devices that compete with the host processor for access to the memory system 10. (See ’740 patent col. 3 lines 34-50.) Continue Reading